Pipelined Multiprocessor System-on-Chip for Multimedia - Javaid, Haris (Springer International Publishing : Imprint: Springer, 2014)
This book describes analytical models and estimation methods to enhance performance estimation of pipelined multiprocessor systems-on-chip (MPSoCs). Â A framework is introduced for both design-time and run-time optimizations. For design space exploration, several algorithms are presented to minimize the area footprint of a pipelined MPSoC under a latency or a throughput constraint. Â A novel adaptive pipelined MPSoC architecture is described, where idle processors are transitioned into low-power states at run-time to reduce energy consumption. Multi-mode pipelined MPSoCs are introduced, where multiple pipelined MPSoCs optimized separately are merged into a single pipelined MPSoC, enabling further reduction of the area footprint by sharing the processors and communication buffers. Readers will benefit from the authorsâ_T combined use of analytical models, estimation methods and exploration algorithms and will be enabled to explore billions of design points in a few minutes. Â  Â·Â Â Â Â Â Â Â Â  Describes the state-of-the-art on pipeline-level parallelism and multimedia MPSoCs; Â·Â Â Â Â Â Â Â Â  Includes analytical models and estimation methods for performance estimation of pipelined MPSoCs; Â·Â Â Â Â Â Â Â Â  Covers several design space exploration techniques for pipelined MPSoCs; Â·Â Â Â Â Â Â Â Â  Introduces an adaptive pipelined MPSoC with run-time processor and power managers; Â·Â Â Â Â Â Â Â Â  Introduces Multi-mode pipelined MPSoCs for multiple applications. Â  Â .